cpu_x86.go

     1  // Copyright 2017 The Go Authors. All rights reserved.
     2  // Use of this source code is governed by a BSD-style
     3  // license that can be found in the LICENSE file.
     4  
     5  //go:build 386 || amd64
     6  
     7  package cpu
     8  
     9  const CacheLinePadSize = 64
    10  
    11  // cpuid is implemented in cpu_x86.s.
    12  func cpuid(eaxArg, ecxArg uint32) (eax, ebx, ecx, edx uint32)
    13  
    14  // xgetbv with ecx = 0 is implemented in cpu_x86.s.
    15  func xgetbv() (eax, edx uint32)
    16  
    17  // getGOAMD64level is implemented in cpu_x86.s. Returns number in [1,4].
    18  func getGOAMD64level() int32
    19  
    20  const (
    21  	// ecx bits
    22  	cpuid_SSE3      = 1 << 0
    23  	cpuid_PCLMULQDQ = 1 << 1
    24  	cpuid_SSSE3     = 1 << 9
    25  	cpuid_FMA       = 1 << 12
    26  	cpuid_SSE41     = 1 << 19
    27  	cpuid_SSE42     = 1 << 20
    28  	cpuid_POPCNT    = 1 << 23
    29  	cpuid_AES       = 1 << 25
    30  	cpuid_OSXSAVE   = 1 << 27
    31  	cpuid_AVX       = 1 << 28
    32  
    33  	// ebx bits
    34  	cpuid_BMI1     = 1 << 3
    35  	cpuid_AVX2     = 1 << 5
    36  	cpuid_BMI2     = 1 << 8
    37  	cpuid_ERMS     = 1 << 9
    38  	cpuid_AVX512F  = 1 << 16
    39  	cpuid_ADX      = 1 << 19
    40  	cpuid_SHA      = 1 << 29
    41  	cpuid_AVX512BW = 1 << 30
    42  	cpuid_AVX512VL = 1 << 31
    43  
    44  	// ecx bits
    45  	cpuid_AVX512VPCLMULQDQ = 1 << 10
    46  
    47  	// edx bits
    48  	cpuid_FSRM = 1 << 4
    49  	// edx bits for CPUID 0x80000001
    50  	cpuid_RDTSCP = 1 << 27
    51  )
    52  
    53  var maxExtendedFunctionInformation uint32
    54  
    55  func doinit() {
    56  	options = []option{
    57  		{Name: "adx", Feature: &X86.HasADX},
    58  		{Name: "aes", Feature: &X86.HasAES},
    59  		{Name: "erms", Feature: &X86.HasERMS},
    60  		{Name: "fsrm", Feature: &X86.HasFSRM},
    61  		{Name: "pclmulqdq", Feature: &X86.HasPCLMULQDQ},
    62  		{Name: "rdtscp", Feature: &X86.HasRDTSCP},
    63  		{Name: "sha", Feature: &X86.HasSHA},
    64  		{Name: "vpclmulqdq", Feature: &X86.HasAVX512VPCLMULQDQ},
    65  	}
    66  	level := getGOAMD64level()
    67  	if level < 2 {
    68  		// These options are required at level 2. At lower levels
    69  		// they can be turned off.
    70  		options = append(options,
    71  			option{Name: "popcnt", Feature: &X86.HasPOPCNT},
    72  			option{Name: "sse3", Feature: &X86.HasSSE3},
    73  			option{Name: "sse41", Feature: &X86.HasSSE41},
    74  			option{Name: "sse42", Feature: &X86.HasSSE42},
    75  			option{Name: "ssse3", Feature: &X86.HasSSSE3})
    76  	}
    77  	if level < 3 {
    78  		// These options are required at level 3. At lower levels
    79  		// they can be turned off.
    80  		options = append(options,
    81  			option{Name: "avx", Feature: &X86.HasAVX},
    82  			option{Name: "avx2", Feature: &X86.HasAVX2},
    83  			option{Name: "bmi1", Feature: &X86.HasBMI1},
    84  			option{Name: "bmi2", Feature: &X86.HasBMI2},
    85  			option{Name: "fma", Feature: &X86.HasFMA})
    86  	}
    87  	if level < 4 {
    88  		// These options are required at level 4. At lower levels
    89  		// they can be turned off.
    90  		options = append(options,
    91  			option{Name: "avx512f", Feature: &X86.HasAVX512F},
    92  			option{Name: "avx512bw", Feature: &X86.HasAVX512BW},
    93  			option{Name: "avx512vl", Feature: &X86.HasAVX512VL},
    94  		)
    95  	}
    96  
    97  	maxID, _, _, _ := cpuid(0, 0)
    98  
    99  	if maxID < 1 {
   100  		return
   101  	}
   102  
   103  	maxExtendedFunctionInformation, _, _, _ = cpuid(0x80000000, 0)
   104  
   105  	_, _, ecx1, _ := cpuid(1, 0)
   106  
   107  	X86.HasSSE3 = isSet(ecx1, cpuid_SSE3)
   108  	X86.HasPCLMULQDQ = isSet(ecx1, cpuid_PCLMULQDQ)
   109  	X86.HasSSSE3 = isSet(ecx1, cpuid_SSSE3)
   110  	X86.HasSSE41 = isSet(ecx1, cpuid_SSE41)
   111  	X86.HasSSE42 = isSet(ecx1, cpuid_SSE42)
   112  	X86.HasPOPCNT = isSet(ecx1, cpuid_POPCNT)
   113  	X86.HasAES = isSet(ecx1, cpuid_AES)
   114  
   115  	// OSXSAVE can be false when using older Operating Systems
   116  	// or when explicitly disabled on newer Operating Systems by
   117  	// e.g. setting the xsavedisable boot option on Windows 10.
   118  	X86.HasOSXSAVE = isSet(ecx1, cpuid_OSXSAVE)
   119  
   120  	// The FMA instruction set extension only has VEX prefixed instructions.
   121  	// VEX prefixed instructions require OSXSAVE to be enabled.
   122  	// See Intel 64 and IA-32 Architecture Software Developer’s Manual Volume 2
   123  	// Section 2.4 "AVX and SSE Instruction Exception Specification"
   124  	X86.HasFMA = isSet(ecx1, cpuid_FMA) && X86.HasOSXSAVE
   125  
   126  	osSupportsAVX := false
   127  	osSupportsAVX512 := false
   128  	// For XGETBV, OSXSAVE bit is required and sufficient.
   129  	if X86.HasOSXSAVE {
   130  		eax, _ := xgetbv()
   131  		// Check if XMM and YMM registers have OS support.
   132  		osSupportsAVX = isSet(eax, 1<<1) && isSet(eax, 1<<2)
   133  
   134  		// AVX512 detection does not work on Darwin,
   135  		// see https://github.com/golang/go/issues/49233
   136  		//
   137  		// Check if opmask, ZMMhi256 and Hi16_ZMM have OS support.
   138  		osSupportsAVX512 = osSupportsAVX && isSet(eax, 1<<5) && isSet(eax, 1<<6) && isSet(eax, 1<<7)
   139  	}
   140  
   141  	X86.HasAVX = isSet(ecx1, cpuid_AVX) && osSupportsAVX
   142  
   143  	if maxID < 7 {
   144  		return
   145  	}
   146  
   147  	_, ebx7, ecx7, edx7 := cpuid(7, 0)
   148  	X86.HasBMI1 = isSet(ebx7, cpuid_BMI1)
   149  	X86.HasAVX2 = isSet(ebx7, cpuid_AVX2) && osSupportsAVX
   150  	X86.HasBMI2 = isSet(ebx7, cpuid_BMI2)
   151  	X86.HasERMS = isSet(ebx7, cpuid_ERMS)
   152  	X86.HasADX = isSet(ebx7, cpuid_ADX)
   153  	X86.HasSHA = isSet(ebx7, cpuid_SHA)
   154  
   155  	X86.HasAVX512F = isSet(ebx7, cpuid_AVX512F) && osSupportsAVX512
   156  	if X86.HasAVX512F {
   157  		X86.HasAVX512BW = isSet(ebx7, cpuid_AVX512BW)
   158  		X86.HasAVX512VL = isSet(ebx7, cpuid_AVX512VL)
   159  		X86.HasAVX512VPCLMULQDQ = isSet(ecx7, cpuid_AVX512VPCLMULQDQ)
   160  	}
   161  
   162  	X86.HasFSRM = isSet(edx7, cpuid_FSRM)
   163  
   164  	var maxExtendedInformation uint32
   165  	maxExtendedInformation, _, _, _ = cpuid(0x80000000, 0)
   166  
   167  	if maxExtendedInformation < 0x80000001 {
   168  		return
   169  	}
   170  
   171  	_, _, _, edxExt1 := cpuid(0x80000001, 0)
   172  	X86.HasRDTSCP = isSet(edxExt1, cpuid_RDTSCP)
   173  }
   174  
   175  func isSet(hwc uint32, value uint32) bool {
   176  	return hwc&value != 0
   177  }
   178  
   179  // Name returns the CPU name given by the vendor.
   180  // If the CPU name can not be determined an
   181  // empty string is returned.
   182  func Name() string {
   183  	if maxExtendedFunctionInformation < 0x80000004 {
   184  		return ""
   185  	}
   186  
   187  	data := make([]byte, 0, 3*4*4)
   188  
   189  	var eax, ebx, ecx, edx uint32
   190  	eax, ebx, ecx, edx = cpuid(0x80000002, 0)
   191  	data = appendBytes(data, eax, ebx, ecx, edx)
   192  	eax, ebx, ecx, edx = cpuid(0x80000003, 0)
   193  	data = appendBytes(data, eax, ebx, ecx, edx)
   194  	eax, ebx, ecx, edx = cpuid(0x80000004, 0)
   195  	data = appendBytes(data, eax, ebx, ecx, edx)
   196  
   197  	// Trim leading spaces.
   198  	for len(data) > 0 && data[0] == ' ' {
   199  		data = data[1:]
   200  	}
   201  
   202  	// Trim tail after and including the first null byte.
   203  	for i, c := range data {
   204  		if c == '\x00' {
   205  			data = data[:i]
   206  			break
   207  		}
   208  	}
   209  
   210  	return string(data)
   211  }
   212  
   213  func appendBytes(b []byte, args ...uint32) []byte {
   214  	for _, arg := range args {
   215  		b = append(b,
   216  			byte((arg >> 0)),
   217  			byte((arg >> 8)),
   218  			byte((arg >> 16)),
   219  			byte((arg >> 24)))
   220  	}
   221  	return b
   222  }
   223
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